module FreMeter_top (
  input clk_50M,
  input rstn,
  input clk_test,
  output tx
);


wire clk_200M;
wire w_gate;
wire w_senden;
wire [31:0] w_fre_data;
wire [31:0] w_pulseWidth;
wire [31:0] w_dutyCycle;

PLL0	PLL0_inst (
	.inclk0 ( clk_50M ),
	.c0 ( clk_200M )
	);


GateGen GateGen_inst (
  .clk_50M( clk_50M ),
  .rstn( rstn ),
  .gate( w_gate ),
  .send_en( w_senden )
  );


FreMeter FreMeter_inst (
  .rstn( rstn ),
  .clk_std( clk_200M ),
  .clk_test( clk_test ),
  .gate( w_gate ),
  .data_fre( w_fre_data )
  );

PulseWidthMeter PulseWidthMeter_inst (
  .rstn( rstn ),
  .en( w_gate ),
  .clk_std( clk_200M ),
  .clk_test( clk_test ),
  .pulseWidth( w_pulseWidth ),
  .dutyCycle( w_dutyCycle )
  );

SendCtrl SendCtrl_inst (
  .clk_50M( clk_50M ),
  .rstn( rstn ),
  .en( w_senden ),
  .FreData( w_fre_data ),
  .PWData( w_pulseWidth ),
  .DCData( w_dutyCycle ),
  .uart_tx( tx )
  );


endmodule